Evidence map›Paper›PMID 39869556›Full record

ArticlePloS one2025

Low-power artificial neuron networks with enhanced synaptic functionality using dual transistor and dual memristor.

Keerthi Nalliboyina, Sakthivel Ramachandran

Abstract read
In one paragraph

Article in PloS one, 2025. The graph could read no effect estimate from its abstract, so it casts no vote on the map. Not yet cited in PubMed.

0numbers the graph read from it
0cells of the map it votes in
0citing papers in PubMed
–field-weighted citation impact
1 · What the graph read from it

What it found

Each row is one number read from the abstract, on the scale the paper reported it, with its interval. Left of the dashed line favours the treatment, right favours the comparator. Under each row is the sentence it came from. New to these charts? A ten-minute tutorial.

The abstract states no effect estimate the extractor could read, or names no intervention and outcome on the map, so this paper lights no cell and moves no belief. It is still indexed, cited and linked below.

2 · The registry

The trial behind it

Trials whose registry record cites this paper, or whose number appears in the abstract. A trial that started after this paper was published is citing it as background, not reporting it.

Neither the registry nor the abstract names a trial number. If this is a trial report, that itself is worth knowing.

3 · Its place in the literature

Who cites it

0 citing papers in PubMed.

No citing paper in PubMed yet.

4 · The record

Corrections and comments

PubMed lists nothing against this paper. Absence here is not a guarantee, only a check that was made.

5 · Who and what money

Authors and funding

2 authors.

Keerthi NalliboyinaSchool of Electronic Science Engineering, Vellore Institute of Technology, Vellore, India.
Sakthivel RamachandranSchool of Electronic Science Engineering, Vellore Institute of Technology, Vellore, India.ORCID 0000-0002-1879-2080

Funding

No grant is acknowledged in the PubMed record.

6 · The paper itself

Abstract

Artificial neurons with bio-inspired firing patterns have the potential to significantly improve the performance of neural network computing. The most significant component of an artificial neuron circuit is a large amount of energy consumption. Recent literature has proposed memristors as a promising option for synaptic implementation. In contrast, implementing memristive circuitry through neuron hardware presents significant challenges and is a relevant research topic. This paper describes an efficient circuit-level mixed CMOS memristor artificial neuron network with a memristor synapse model. From this perspective, the paper describes the design of artificial neurons in standard CMOS technology with low power utilization. The neuron circuit response is a modified version of the Morris-Lecar theoretical model. The suggested circuit employs memristor-based artificial neurons with Dual Transistor and Dual Memristor (DTDM) synapse circuit. The proposed neuron network produces a high spiking frequency and low power consumption. According to our research, a memristor-based Morris Lecar (ML) neuron with a DTDM synapse circuit consumes 12.55 pW of power, the spiking frequency is 22.72 kHz, and 2.13 fJ of energy per spike. The simulations were carried out using the Spectre tool with 45 nm CMOS technology.

Indexed as

Neural Networks, ComputerNeuronsSynapsesTransistors, ElectronicAction PotentialsModels, Neurological

Identifiers

PMID39869556
PMCPMC11771950

What Socratic holds

Textmetadata
LicenceCC BY
Read underepoch 390

Registered trials

None linked

Read under generation 80e0d062 · epoch 390. Bibliography from PubMed, PubMed Central and OpenAlex; grants from NIH RePORTER; trial links from ClinicalTrials.gov; estimates, votes and beliefs from the Socratic graph.